`timescale 1ns / 1ps

////////////////////////////////////////////////////////////////////////////////
// Company: 
// Engineer:
//
// Create Date:   21:56:27 04/02/2011
// Design Name:   multiOperandAdder
// Module Name:   C:/peter/enee408/project/FIRfilter/multi_tb.v
// Project Name:  FIRfilter
// Target Device:  
// Tool versions:  
// Description: 
//
// Verilog Test Fixture created by ISE for module: multiOperandAdder
//
// Dependencies:
// 
// Revision:
// Revision 0.01 - File Created
// Additional Comments:
// 
////////////////////////////////////////////////////////////////////////////////

module multi_tb;


	parameter NM=8;
	parameter K=4;

	// Inputs
	reg [NM*K-1:0] operands;
	reg clock;
	
	reg [NM-1:0] op_1,op_2,op_3,op_4;

	// Outputs
	wire [NM-1:0] s_out;

	// Instantiate the Unit Under Test (UUT)
	multiOperandAdder #(.NM(NM),.K(K)) uut (
		.operands(operands), 
		.s_out(s_out), 
		.clock(clock)
	);

	initial begin
	$monitor($time,, "a_in = %d, b_in=%d, c_in=%d, d_in=%d,      s_out=%d"	, op_1,op_2,op_3,op_4, s_out);
		// Initialize Inputs
		op_1 = 0;
		op_2 = 0;
		op_3 = 0;
		op_4 = 0;
		operands = 0;
		clock = 1;

		// Wait 100 ns for global reset to finish
		#100;
        
		// Add stimulus here
		op_1 = 8'd1;
		op_2 = 8'd0;
		op_3 = 8'd5;
		op_4 = 8'd0;
		operands ={op_1,op_2,op_3,op_4};
		#10;
		
		op_1 = 8'd3;
		op_2 = 8'd5;
		op_3 = 8'd9;
		op_4 = 8'd15;
		operands ={op_1,op_2,op_3,op_4};
		#10;
		
		op_1 = 8'd100;
		op_2 = 8'd50;
		op_3 = 8'd50;
		op_4 = 8'd50;
		operands ={op_1,op_2,op_3,op_4};
		#10;
		
		op_1 = 8'd8;
		op_2 = 8'd200;
		op_3 = 8'd25;
		op_4 = 8'd20;
		operands ={op_1,op_2,op_3,op_4};
		#10;
		
		op_1 = 8'd1;
		op_2 = 8'd1;
		op_3 = 8'd250;
		op_4 = 8'd0;
		operands ={op_1,op_2,op_3,op_4};
		#10;
		
		op_1 = 8'd50;
		op_2 = 8'd50;
		op_3 = 8'd3;
		op_4 = 8'd148;
		operands ={op_1,op_2,op_3,op_4};
		#10;
		

	end
	
	always begin
		#5 clock <= ~clock;
	end
      
endmodule
